The present invention relates to processors, and more specifically to processor threads.
Advanced processors can typically create a number of threads (e.g., four), which may be subparts of a process. The threads are usually assigned identifiers (e.g., 0, 1, 2, and 3) and executed in a time-division multiplex manner by the processor. Additionally, the threads may share the same memory (e.g., registers) on the processor or have memory assigned to them (e.g., particular registers). When a thread is complete, its data is typically removed from the processor memory by stopping operations, moving the data to be retained out to another memory (e.g., main memory), invalidating the processor memory, and then loading the data to be saved back into the processor memory.